Module: vout_frequency

Child-Modules

Source

2 module vout_frequency
3      (
4          input clk,
5          input signed [31:0] frequency,
6          input disabled,
7          output SIGNAL
8      );
9 
10     wire DIR;
11     assign DIR = (frequency > 0);
12     reg [31:0] freqCounter = 32'd0;
13     reg [31:0] frequencyAbs = 32'd0;
14     reg _signal = 0;
15     assign SIGNAL = _signal;
16     always @ (posedge clk) begin
17         if (DIR) begin
18             frequencyAbs <= frequency / 2;
19         end else begin
20             frequencyAbs <= -frequency / 2;
21         end
22         freqCounter <= freqCounter + 1;
23         if (frequency != 0) begin
24             if (freqCounter >= frequencyAbs) begin
25                 _signal <= ~_signal;
26                 freqCounter <= 32'b0;
27             end
28         end
29     end
30 endmodule