Module: bin2bcd
Ports:
|
| Direction | Size | Name |
|---|
| output | [19:0] | bcd |
| input | [15:0] | bin |
Child-Modules
Source
Filename: vout_7seg.v
99 module bin2bcd(
100 input [15:0] bin,
101 output reg [19:0] bcd
102 );
103 integer i;
104 always @(bin) begin
105 bcd=0;
106 for (i = 0; i < 16; i = i + 1) begin
107 if (bcd[3:0] >= 5) bcd[3:0] = bcd[3:0] + 3;
108 if (bcd[7:4] >= 5) bcd[7:4] = bcd[7:4] + 3;
109 if (bcd[11:8] >= 5) bcd[11:8] = bcd[11:8] + 3;
110 if (bcd[15:12] >= 5) bcd[15:12] = bcd[15:12] + 3;
111 if (bcd[19:16] >= 5) bcd[19:16] = bcd[19:16] + 3;
112
113 bcd = {bcd[18:0], bin[15 - i]};
114 end
115 end
116 endmodule